RGB转MIPI的桥接芯片SSD2828程序
本程序是驱动BOE3.97的,因此中间初始化的数据包是给BOE3.97+NT35510的,其他方案需要修改。
#include "bsp_ssd2828_bridge.h" #include "bsp_SysTick.h" #include "bsp_led.h" #include "bsp_usart1.h" #include "bsp_ssd1963_lcd.h" //用到里面的LCD参数宏定义,例如LCD_HDP,LCD_HFP,LCD_HBP,LCD_HSPW void SSD2828_GPIO_Config(void) { GPIO_InitTypeDef GPIO_InitStructure; RCC_APB2PeriphClockCmd( RCC_APB2Periph_GPIOE , ENABLE); GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; /* 配置模拟SPI相对应的控制线 * PE3 : SPI-SCK * PE4 : SPI-SDA * PE5 : SPI-CS * PE6 : SPI-RST */ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6; GPIO_Init(GPIOE, &GPIO_InitStructure); SSD2828_SPI_RST= 1; SSD2828_SPI_CS = 1; SSD2828_SPI_SDA= 0; SSD2828_SPI_SCK= 0; } //SPI3W8BIT void SPI_WriteCmd8Bit( uint8_t CmdByte ) { uint8_t i; SSD2828_SPI_CS = 0; SSD2828_SPI_SCK= 0; SSD2828_SPI_SDA= 0; //DC=0=command //__nop(); SSD2828_SPI_SCK= 1; //__nop(); for(i=0;i<8;i++) { SSD2828_SPI_SCK = 0; if( CmdByte&0x80 ) { SSD2828_SPI_SDA = 1; } else { SSD2828_SPI_SDA = 0; } //__nop(); SSD2828_SPI_SCK = 1; //__nop(); CmdByte = CmdByte<<1; } SSD2828_SPI_CS = 1; } void SPI_WriteDat8Bit( uint8_t DatByte ) { uint8_t i; SSD2828_SPI_CS = 0; SSD2828_SPI_SCK= 0; SSD2828_SPI_SDA= 1; //DC=1=data //__nop(); SSD2828_SPI_SCK= 1; //__nop(); for(i=0;i<8;i++) { SSD2828_SPI_SCK = 0; if( DatByte&0x80 ) { SSD2828_SPI_SDA = 1; } else { SSD2828_SPI_SDA = 0; } //__nop(); SSD2828_SPI_SCK = 1; //__nop(); DatByte = DatByte<<1; } SSD2828_SPI_CS = 1; } void SSD2828_SPI_WriteReg(uint8_t reg,uint16_t para) { SSD2828_SPI_CS = 0; SPI_WriteCmd8Bit(reg); SPI_WriteDat8Bit(para&0xFF); //LSB在前 SPI_WriteDat8Bit((para>>8)&0xFF); //MSB在前 SSD2828_SPI_CS = 1; } void SSD2828_SPI_WritePacket(const uint8_t *PData) { uint8_t i; uint16_t number; uint8_t temp; number = (uint16_t)(*PData); //字节数 PData++; SSD2828_SPI_WriteReg(0xBC,number&0x0FFF); //理论上不超过4096,实际这里作为字节不超过255 SSD2828_SPI_CS = 0; SPI_WriteCmd8Bit(0xBF); for(i=0;i<number;i++) { temp = *PData; PData++; SPI_WriteDat8Bit(temp); // printf("Packet Write Value=0x%2X\r\n",temp); } SSD2828_SPI_CS = 1; // printf("\r\n\r\n"); } //外部LCD和SSD2828的复位,两个接在一起的 void LCD_and_SSD2828_Reset(void) { SSD2828_SPI_RST = 1; Delay_MS(50); SSD2828_SPI_RST = 0; Delay_MS(250); SSD2828_SPI_RST = 1; Delay_MS(50); } //NT35510+BOE3.97 MIPI初始化参数 const uint8_t tab1[]={6,0xF0,0x55,0xAA,0x52,0x08,0x01}; //Enable Page1 const uint8_t tab2[]={4,0xB6,0x34,0x34,0x34}; //AVDD: manual const uint8_t tab3[]={4,0xB0,0x09,0x09,0x09}; const uint8_t tab4[]={4,0xB7,0x24,0x24,0x24}; //AVEE: manual, 6V const uint8_t tab5[]={4,0xB1,0x09,0x09,0x09}; const uint8_t tab6[]={2,0xB8,0x34}; //Power Control for VCL const uint8_t tab7[]={2,0xB2,0x00}; const uint8_t tab8[]={4,0xB9,0x24,0x24,0x24}; //VGH: Clamp Enable const uint8_t tab9[]={4,0xB3,0x05,0x05,0x05}; const uint8_t tab10[]={2,0xBF,0x01}; const uint8_t tab11[]={4,0xBA,0x34,0x34,0x34}; //VGL(LVGL) const uint8_t tab12[]={4,0xB5,0x0B,0x0B,0x0B}; //VGL_REG(VGLO) const uint8_t tab13[]={4,0xBC,0X00,0xA3,0X00}; //VGMP/VGSP const uint8_t tab14[]={4,0xBD,0x00,0xA3,0x00}; //VGMN/VGSN const uint8_t tab15[]={3,0xBE,0x00,0x50}; //VCOM const uint8_t tab16[]={53,0xD1,0x00,0x37,0x00,0x52,0x00,0x7B,0x00,0x99,0x00,0xB1,0x00,0xD2,0x00,0xF6,0x01,0x27,0x01,0x4E,0x01,0x8C,0x01,0xBE,0x02,0x0B,0x02,0x48,0x02,0x4A,0x02,0x7E,0x02,0xBC,0x02,0xE1,0x03,0x10,0x03,0x31,0x03,0x5A,0x03,0x73,0x03,0x94,0x03,0x9F,0x03,0xB3,0x03,0xB9,0x03,0xC1}; //R+ const uint8_t tab17[]={53,0xD2,0x00,0x37,0x00,0x52,0x00,0x7B,0x00,0x99,0x00,0xB1,0x00,0xD2,0x00,0xF6,0x01,0x27,0x01,0x4E,0x01,0x8C,0x01,0xBE,0x02,0x0B,0x02,0x48,0x02,0x4A,0x02,0x7E,0x02,0xBC,0x02,0xE1,0x03,0x10,0x03,0x31,0x03,0x5A,0x03,0x73,0x03,0x94,0x03,0x9F,0x03,0xB3,0x03,0xB9,0x03,0xC1}; //G+ const uint8_t tab18[]={53,0xD3,0x00,0x37,0x00,0x52,0x00,0x7B,0x00,0x99,0x00,0xB1,0x00,0xD2,0x00,0xF6,0x01,0x27,0x01,0x4E,0x01,0x8C,0x01,0xBE,0x02,0x0B,0x02,0x48,0x02,0x4A,0x02,0x7E,0x02,0xBC,0x02,0xE1,0x03,0x10,0x03,0x31,0x03,0x5A,0x03,0x73,0x03,0x94,0x03,0x9F,0x03,0xB3,0x03,0xB9,0x03,0xC1}; //B+ const uint8_t tab19[]={53,0xD4,0x00,0x37,0x00,0x52,0x00,0x7B,0x00,0x99,0x00,0xB1,0x00,0xD2,0x00,0xF6,0x01,0x27,0x01,0x4E,0x01,0x8C,0x01,0xBE,0x02,0x0B,0x02,0x48,0x02,0x4A,0x02,0x7E,0x02,0xBC,0x02,0xE1,0x03,0x10,0x03,0x31,0x03,0x5A,0x03,0x73,0x03,0x94,0x03,0x9F,0x03,0xB3,0x03,0xB9,0x03,0xC1}; //R- const uint8_t tab20[]={53,0xD5,0x00,0x37,0x00,0x52,0x00,0x7B,0x00,0x99,0x00,0xB1,0x00,0xD2,0x00,0xF6,0x01,0x27,0x01,0x4E,0x01,0x8C,0x01,0xBE,0x02,0x0B,0x02,0x48,0x02,0x4A,0x02,0x7E,0x02,0xBC,0x02,0xE1,0x03,0x10,0x03,0x31,0x03,0x5A,0x03,0x73,0x03,0x94,0x03,0x9F,0x03,0xB3,0x03,0xB9,0x03,0xC1}; //G- const uint8_t tab21[]={53,0xD6,0x00,0x37,0x00,0x52,0x00,0x7B,0x00,0x99,0x00,0xB1,0x00,0xD2,0x00,0xF6,0x01,0x27,0x01,0x4E,0x01,0x8C,0x01,0xBE,0x02,0x0B,0x02,0x48,0x02,0x4A,0x02,0x7E,0x02,0xBC,0x02,0xE1,0x03,0x10,0x03,0x31,0x03,0x5A,0x03,0x73,0x03,0x94,0x03,0x9F,0x03,0xB3,0x03,0xB9,0x03,0xC1}; //B- const uint8_t tab22[]={6,0xF0,0x55,0xAA,0x52,0x08,0x00}; //Enable Page0 const uint8_t tab01[]={3,0xB1,0xF8,0x00}; const uint8_t tab23[]={6,0xB0,0x08,0x05,0x02,0x05,0x02}; //RGB I/F Setting const uint8_t tab24[]={2,0xB6,0x0A}; //SDT const uint8_t tab25[]={3,0xB7,0x00,0x70}; //Gate EQ const uint8_t tab26[]={5,0xB8,0x01,0x05,0x05,0x05}; //Source EQ const uint8_t tab27[]={4,0xBC,0x00,0x00,0x00}; //Inversion: Column inversion (NVT) const uint8_t tab28[]={4,0xCC,0x03,0x00,0x00}; //BOE's Setting (default) const uint8_t tab29[]={6,0xBD,0x01,0x84,0x07,0x31,0x00}; //Display Timing const uint8_t tab30[]={2,0xBA,0x01}; const uint8_t tab31[]={5,0xFF,0xAA,0x55,0x25,0x01}; const uint8_t tab32[]={2,0x3A,0x77}; //Pixel Format 0x77=24bpp const uint8_t SleeOut[]={1,0x11}; const uint8_t DisplayON[]={1,0x29}; const uint8_t ALLON[]={1,0x23}; const uint8_t ALLOFF[]={1,0x22}; //SSD2828 MIPI Bridge芯片初始化 void LCD_SSD2828_Init(void) { SSD2828_GPIO_Config(); LCD_and_SSD2828_Reset(); //Packet Write Configuration SSD2828_SPI_WriteReg(0xB7,0x0050); //LP DCS Write SSD2828_SPI_WriteReg(0xB8,0x0000); //VC(Virtual ChannelID) Control Register SSD2828_SPI_WriteReg(0xB9,0x0000); //PLL Disable //PLL configuration //FR: bit15~14 //00 – 62.5 < OUT f < 125 //01 – 126 < OUT f < 250 //10 – 251 < OUT f < 500 //11 – 501 < OUT f < 1000 SSD2828_SPI_WriteReg(0xBA,0x4214); //Fout = Fin * 0x14 / 2 = 24M * 20 /2 = 240M SSD2828_SPI_WriteReg(0xBB,0x0003); //LP(Low Power) Clock = Fout /4/8 = 7.5M SSD2828_SPI_WriteReg(0xB9,0x0001); //PLL ENABLE //MIPI Lane Configure //00 - 1 lane mode //01 - 2 lane mode //10 - 3 lane mode //11 - 4 lane mode SSD2828_SPI_WriteReg(0xDE,0x0001); //11=4LANE 10=3LANE 01=2LANE 00=1LANE SSD2828_SPI_WriteReg(0xC9,0x2302); //p1: HS-Data-zero p2: HS-Data- prepare --> 8031 issue Delay_MS(100); //此处延时试验过无作用,暂时保留 //Send command and data through MIPI //use MIPI Init LCD SSD2828_SPI_WritePacket(tab1); SSD2828_SPI_WritePacket(tab2); SSD2828_SPI_WritePacket(tab3); SSD2828_SPI_WritePacket(tab4); SSD2828_SPI_WritePacket(tab5); SSD2828_SPI_WritePacket(tab6); SSD2828_SPI_WritePacket(tab7); SSD2828_SPI_WritePacket(tab8); SSD2828_SPI_WritePacket(tab9); SSD2828_SPI_WritePacket(tab10); SSD2828_SPI_WritePacket(tab11); SSD2828_SPI_WritePacket(tab12); SSD2828_SPI_WritePacket(tab13); SSD2828_SPI_WritePacket(tab14); SSD2828_SPI_WritePacket(tab15); SSD2828_SPI_WritePacket(tab16); SSD2828_SPI_WritePacket(tab17); SSD2828_SPI_WritePacket(tab18); SSD2828_SPI_WritePacket(tab19); SSD2828_SPI_WritePacket(tab20); SSD2828_SPI_WritePacket(tab21); SSD2828_SPI_WritePacket(tab22); SSD2828_SPI_WritePacket(tab01); SSD2828_SPI_WritePacket(tab23); SSD2828_SPI_WritePacket(tab24); SSD2828_SPI_WritePacket(tab25); SSD2828_SPI_WritePacket(tab26); SSD2828_SPI_WritePacket(tab27); SSD2828_SPI_WritePacket(tab28); SSD2828_SPI_WritePacket(tab29); SSD2828_SPI_WritePacket(tab30); SSD2828_SPI_WritePacket(tab31); SSD2828_SPI_WritePacket(tab32); SSD2828_SPI_WritePacket(SleeOut); Delay_MS(150); SSD2828_SPI_WritePacket(DisplayON); Delay_MS(10); Delay_MS(200); //Packet Write Configuration SSD2828_SPI_WriteReg(0xB7,0x0050); //LP DCS Write,50=TX_CLK 70=PCLK SSD2828_SPI_WriteReg(0xB8,0x0000); //VC(Virtual ChannelID) Control Register SSD2828_SPI_WriteReg(0xB9,0x0000); //PLL Disable //PLL configuration //FR: bit15~14 //00 – 62.5 < OUT f < 125 //01 – 126 < OUT f < 250 //10 – 251 < OUT f < 500 //11 – 501 < OUT f < 1000 //PLL=(TX_CLK/MS)*NS 8228=480M 4428=240M 061E=120M 4214=240M 821E=360M 8219=300M 8225=444M 8224=432 8012=432 SSD2828_SPI_WriteReg(0xBA,0x8012); //Fout = Fin * 0x28 / 3 = 24M * 40 /2 = 480M SSD2828_SPI_WriteReg(0xBB,0x0007); //LP(Low Power) Clock = Fout /8/8 = 7.5M SSD2828_SPI_WriteReg(0xB9,0x0001); //PLL ENABLE,时钟没使能的现象就是满屏的杂色点 //Delay Timeing SSD2828_SPI_WriteReg(0xC9,0x2302); //p1: HS-Data-zero p2: HS-Data- prepare --> 8031 issue Delay_MS(5); SSD2828_SPI_WriteReg(0xCA,0x2301); SSD2828_SPI_WriteReg(0xCB,0x0510); SSD2828_SPI_WriteReg(0xCC,0x1005); //0x100A也没问题,0A是默认值 Delay_MS(5); SSD2828_SPI_WriteReg(0xD0,0x0000); //HS TX Timer=0,复位默认值=0x0010 Delay_MS(5); //RGB Input Interface Control SSD2828_SPI_WriteReg(0xB1,(LCD_VSPW<<8) + LCD_HSPW); SSD2828_SPI_WriteReg(0xB2,(LCD_VBP <<8) + LCD_HBP); SSD2828_SPI_WriteReg(0xB3,(LCD_VFP <<8) + LCD_HFP); SSD2828_SPI_WriteReg(0xB4,LCD_HDP); SSD2828_SPI_WriteReg(0xB5,LCD_VDP); SSD2828_SPI_WriteReg(0xB6,0x0003); //HS,VS,PCLK极性都=0 , Bit[1:0]=11=24bpp //00 = Non burst mode with sync pulses //01 = Non burst mode with sync events //10 = Burst mode //11 = Reserved //MIPI Lane Configure //00 - 1 lane mode //01 - 2 lane mode //10 - 3 lane mode //11 - 4 lane mode SSD2828_SPI_WriteReg(0xDE,0x0001); //2 Data Lane,11=4LANE 10=3LANE 01=2LANE 00=1LANE SSD2828_SPI_WriteReg(0xD6,0x0005); //Bit[7:2]:Send X(now=1) Packet in Blanking Period, Bit[0]:1=R.G.B/0=B.G.R SSD2828_SPI_WriteReg(0xB7,0x024B); //0x024B选择TX_CLK晶振为MIPI时钟,0x026B选择RGB的PCLK为MIPI时钟 }
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